DESCRIPTION:
Annapurna Labs (our organization within AWS Utility Computing) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.
Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. We have data center locations in the U.S., Europe, Singapore, and Japan, and customers across all industries.
Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, Trainium Systems (our custom designed machine learning inference and training datacenter servers). Our success depends on our world-class server infrastructure; we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
Key job responsibilities
Define, develop and deploy innovative physical design and verification methodologies (RTL2GDS) for ML Accelerator chips in advanced nodes
Drive Optimizations in CAD flows/methodologies for PPA and TAT improvements
Work with EDA tool vendors to evaluate new methods, resolve bugs, improve usability.
Fine tune cloud infrastructure to improve compute and storage utilization for physical design work.
Interface directly with RTL, Physical Design, Package Design, DFT teams to improve methodologies and efficiencies.
Be able to independently troubleshoot digital tool flow usage and deploy solutions;
Fluent in scripting languages such as TCL, Python, etc. and able to build scalable and efficient flows to support parallel design developments
Create Dashboard and Central reports for project tracking and visualizing QoR/stats
A day in the life
BASIC QUALIFICATIONS:
-BS + 10yrs or MS + 7yrs in EE/CS
-5+ years developing physical design methodology or CAD flows in synthesis, PNR, and sign-off areas for advanced technology nodes.
-Proficient in programming/scripting languages (Perl, Python, C++)
-Solid understanding of ASIC physical design, and methodologies including synthesis, place and route, STA, IR, formal and physical verification.
-Demonstrated level of expertise in PD tools such as Innovus, ICC2, Fusion Compiler, STA, and Sign-Off.
-Proven track record of delivering metric driven PPA flow development and support.
PREFERRED QUALIFICATIONS:
-Expertise in high-performance, low-power physical design, and implementation techniques with industry standard synthesis, PnR, or Signoff tools.The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.
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